In applications where high voltage semiconductor devices operating in high voltage conditions are controlled, high breakdown voltage transistors are typically used in corresponding control circuits. For example, in traditional gallium nitride (GaN) power management applications, transistors such as laterally diffused metal oxide semiconductor (LDMOS), bipolar or high voltage metal-oxide-semiconductor field-effect transistors (MOSFETs) can be utilized to control the GaN devices operating in high voltage conditions. Since these control transistors typically have poor figure of merit (FOM), compared to the FOM of the GaN devices, which can thereby, for example, limit the operating frequencies of the GaN devices, the overall circuit (e.g. power management) can be limited in performance by the large, high voltage control transistors which can be difficult to charge and discharge quickly (e.g. their FOM is too high) and therefore the benefit of using the GaN devices can be substantially reduced.
Alternatively, low breakdown voltage transistors may be used to control the high voltage semiconductor devices. The low break down voltage transistors may operate in circuits having different voltage (i.e. supply) domains, such as a first low voltage circuit operating with respect to a fixed reference voltage (e.g. 0 volts) and a second low voltage circuit operating with respect to a flying (i.e., switching) reference voltage, where the reference voltage can switch from a low reference voltage (e.g. 0 volts) to a high reference voltage (e.g. 12-100 volts and higher). One such implementation is described, for example, in the above referenced U.S. Pat. No. 9,484,897, the disclosure of which is incorporated herein by reference.
Prior art implementations using low breakdown voltage transistors use non-galvanic coupling (e.g. capacitive, magnetic, optical) between the first and second low voltage circuits to transmit timing control information from one voltage domain to the other. Due to the nature of the non-galvanic coupling, only an AC component of the timing control information may be transmitted through the coupling.
Accordingly, some prior art implementations with non-galvanic coupling regenerate the timing control signal in the second voltage domain based on a leading and a trailing edge of a pulse signal representing the timing control information in the first voltage domain. This means that the second circuit operating in the second voltage domain must be fast enough to operate on such edges and be immune to side effects of the flying reference voltage with respect to which it operates. If such side effects cause an edge of the pulse signal not being detected, then inefficient and potentially damaging control of the high voltage semiconductor devices may be obtained.
Other prior art implementations with non-galvanic coupling may first generate bursts of a high frequency signal by gating the high frequency signal (e.g. as derived by an oscillator circuit) with a pulse representing the timing control information and transmit the entire burst through the non-galvanic coupling. In turn, the second circuit operating in the second voltage domain can recover the timing information by detecting the envelope of the burst signal, as described, for example in the U.S. Patent Publication US 2009/0206817 A1. Added complexity related to the introduction and manipulation of the high frequency signal, as well as coupling effects of such high frequency signal may render such implementation undesirable in some applications.
Based on the above, it may be desirable to provide methods and devices to control the high voltage semiconductor devices with low break down voltage transistors without the above-mentioned shortcoming of the prior art.